1. Field of Invention
The present invention relates to a memory system having error correcting and detecting (EDC) circuitry, for use in an electronic computing system. More particularly, the invention relates to an electronic data processing system having a user-configurable filter for selectively masking errors encountered in reading and writing data to and from a memory module in the system.
2. Description of Related Art
One of the most important features of most electronic computing systems is their memory. Typically the term "memory" is used to mean the volatile memory of a computing system, otherwise known as random access memory (RAM), or simply "memory". RAM only maintains its stored data as long as it receives electrical power; without electrical power, the RAM contents are lost. However, RAM offers a number of advantages over non-volatile memories, the chief advantage being the speed at which data can be written to and read from the RAM.
Sometimes errors occur when data is read from or written to memory. The first step in rectifying such errors is to identify the error that occurred, as well as various signals present in the computing system at the time of the error. In some computing systems, these signals are generated by various circuit components and stored in one or more control and status registers, called "CSRs". For example, a typical CSR might be provided with some of the following items: an indication of what type of error occurred, the memory address that was being written to or read from when the error occurred, a number of check bits associated with the data that was being written to or read from memory when the error occurred, and specialized error correcting signals called "syndromes" associated with the data that was being written or read at the time of the memory error.
Although CSRs are useful in solving memory problems in many applications, there are other applications in which further improvement would be helpful. Specifically, a need to minimize memory size usually mandates that only a small number of CSRs are utilized. Typically, one CSR is provided for each "memory module", wherein a memory module comprises a collection of cooperating memory banks. Each time a new memory error occurs, the data associated with that error is written into the CSR associated with the memory module where the error occurred. If at the time of the new memory error the CSR already contains data corresponding to a previous error, the previous data would be effectively deleted, or "written-over". Accordingly, a CSR at any given time is more likely to contain data associated with a frequently occurring memory error then data from an infrequent error. Data from a one-time or otherwise infrequent memory error will normally only be present in a CSR until the next memory error occurs. As a result, central processing components that utilize information obtained from CSRs are sometimes unable to detect the infrequent errors, thereby reducing the effectiveness of the computing system's fault management programs. The overall effect is that the computing system's reliability is diminished.
One approach to this problem might be to record a CSR's contents each time a memory error occurs in an alternate storage location, such as non-volatile memory, and to search these alternate storage locations for errors of interest. This approach is not as efficient as might be desired, however, since recording the CSR contents in the alternate storage location takes additional time, which may well delay the operation of the memory. Furthermore, this approach is also inefficient since it requires the alternate storage location to provide a large amount of memory to accommodate the frequently-occurring errors, even if the error of real interest is an infrequent error such as a one-time error.